Security researchers have uncovered a critical vulnerability in AMD Zen CPUs that allows attackers with elevated privileges<\/a> to load malicious microcode patches, bypassing cryptographic signature checks.<\/p>\n Dubbed \u201cEntrySign,\u201d this flaw stems from AMD\u2019s use of the AES-CMAC algorithm as a hash function during microcode validation\u2014a design decision that enables collision attacks and signature forgery.<\/p>\n According to Google\u2019s Bug Hunting<\/a> researchers, modern x86 processors like AMD\u2019s Zen architecture rely on microcode\u2014a layer of RISC-like instructions that translate complex x86 operations into executable hardware logic.\u00a0<\/p>\n AMD employs encrypted microcode updates authenticated via RSA-2048 signatures to patch hardware bugs without physical recalls. The validation process involves four stages:<\/p>\n This chain assumes CMAC\u2019s collision resistance\u2014an assumption shattered by EntrySign\u2019s findings.<\/p>\n The fatal flaw lies in AMD\u2019s dual use of AES-CMAC as both a key hashing and content authentication mechanism.\u00a0<\/p>\n While CMAC provides integrity against passive attackers, it fails catastrophically when adversaries control the AES key\u2014a scenario made feasible through hardware reverse engineering or side-channel attacks.<\/p>\n Researchers demonstrated that knowing the AES-CMAC key enables:<\/p>\n The attack exploits CMAC\u2019s linear structure\u2014by injecting a 16-byte \u201ccompensating block\u201d (ae4634b83805ea28d7ecac0053a6ab6c), attackers manipulate intermediate CMAC states to force collisions.\u00a0<\/p>\n This allowed creating a valid RSA key pair (N = 0x151d07eae2f\u2026) that factors into small primes, enabling private key<\/a> derivation:<\/p>\n With a colliding public key, attackers bypass AMD\u2019s fused hash check. They then exploit RSASSA-PKCS1-v1.5\u2019s lax padding verification to sign malicious microcode.\u00a0<\/p>\n A proof-of-concept patch hijacked the RDRAND instruction to always return 4:<\/p>\n EntrySign exposes all Zen 1-4 CPUs to persistent microcode hijacking by attackers with ring-0 access. While patches reset on reboot, threats persist in:<\/p>\n AMD\u2019s mitigation replaces CMAC with a custom hash and deploys Secure Processor (ASP) checks before x86 cores activate. However, retrofitting older Zen architectures remains challenging due to ROM storage constraints.<\/p>\n \u201cThis vulnerability underscores the fragility of cryptographic trust anchors in hardware,\u201d noted the research team.\u00a0<\/p>\n \u201cWhen security-critical algorithms like hashing are repurposed beyond their design scope, it creates systemic risks.\u201d<\/p>\n The disclosure coincides with the release<\/a> of Zentool, an open-source framework for analyzing and crafting AMD microcode. Researchers hope it will promote community efforts to audit and harden low-level CPU security.<\/p>\n As CPUs increasingly underpin cloud and AI infrastructures, EntrySign highlights the urgent need for agile, updateable cryptographic primitives in silicon, a lesson the industry is now racing to implement.<\/p>\n The post AMD Microcode Signature Verification Vulnerability Let Attackers Load Malicious Patches<\/a> appeared first on Cyber Security News<\/a>.<\/p>\n<\/div>\nMicrocode Security Foundations<\/strong><\/h2>\n
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The CMAC Hash Collision Vulnerability<\/strong><\/h2>\n
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Exploitation Mechanics<\/strong><\/h2>\n
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Mitigations<\/strong><\/h2>\n
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